Fault-Tolerance Techniques for SRAM-Based FPGAs

Fault-Tolerance Techniques for SRAM-Based FPGAs

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This book reviews fault-tolerance techniques for SRAM-based Field Programmable Gate Arrays (FPGAs), outlining many methods for designing fault tolerance systems. Some of these are based on new fault-tolerant architecture, and others on protecting the high-level hardware description before synthesis in the FPGA. The text helps the reader choose the best techniques project-by-project, and to compare fault tolerant techniques for programmable logic applications.Example of INVERTER logic with the code word state preserving (CWSP) in the duplication and time redundancy to mitigate SET in combinational logic 3.1.2.2 Error Correction and Detection Codes Error detection and correction codinganbsp;...


Title:Fault-Tolerance Techniques for SRAM-Based FPGAs
Author: Fernanda Lima Kastensmidt, Ricardo Reis
Publisher:Springer Science & Business Media - 2007-02-01
ISBN-13:

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